programlibs/Bits/demos/record.xtl

A packed record: a device register keeps three settings in one whole number. f_ields< names its bit fields when the program is compiled: it writes a getter and a setter per field, the shifts and masks worked out as plain numbers, so the program reads and writes fields by name. Run with "just demo Bits record".

source · imports b: libs/Bits/src/Bits.xtl libs/Bits/src/Bits.xtlm

ᵘo̲n : Int -> Int

function · line 9
@ ᵇf̲ields< "on:1 mode:3 level:8"
ᵇf̲ields< expands to
ᵘo̲n ← { x → (x d̲iv 1) m̲od 2 }
ᵘs̲etOn ← { v x → x + (1 × v m̲od 2) − 1 × (x d̲iv 1) m̲od 2 }
ᵘm̲ode ← { x → (x d̲iv 2) m̲od 8 }
ᵘs̲etMode ← { v x → x + (2 × v m̲od 8) − 2 × (x d̲iv 2) m̲od 8 }
ᵘl̲evel ← { x → (x d̲iv 16) m̲od 256 }
ᵘs̲etLevel ← { v x → x + (16 × v m̲od 256) − 16 × (x d̲iv 16) m̲od 256 }
Used in: libs/Bits/demos/record.xtl:16

ᵘs̲etOn : Int -> Int -> Int

function · line 9
@ ᵇf̲ields< "on:1 mode:3 level:8"
ᵇf̲ields< expands to
ᵘo̲n ← { x → (x d̲iv 1) m̲od 2 }
ᵘs̲etOn ← { v x → x + (1 × v m̲od 2) − 1 × (x d̲iv 1) m̲od 2 }
ᵘm̲ode ← { x → (x d̲iv 2) m̲od 8 }
ᵘs̲etMode ← { v x → x + (2 × v m̲od 8) − 2 × (x d̲iv 2) m̲od 8 }
ᵘl̲evel ← { x → (x d̲iv 16) m̲od 256 }
ᵘs̲etLevel ← { v x → x + (16 × v m̲od 256) − 16 × (x d̲iv 16) m̲od 256 }
Used in: reg

ᵘm̲ode : Int -> Int

function · line 9
@ ᵇf̲ields< "on:1 mode:3 level:8"
ᵇf̲ields< expands to
ᵘo̲n ← { x → (x d̲iv 1) m̲od 2 }
ᵘs̲etOn ← { v x → x + (1 × v m̲od 2) − 1 × (x d̲iv 1) m̲od 2 }
ᵘm̲ode ← { x → (x d̲iv 2) m̲od 8 }
ᵘs̲etMode ← { v x → x + (2 × v m̲od 8) − 2 × (x d̲iv 2) m̲od 8 }
ᵘl̲evel ← { x → (x d̲iv 16) m̲od 256 }
ᵘs̲etLevel ← { v x → x + (16 × v m̲od 256) − 16 × (x d̲iv 16) m̲od 256 }
Used in: libs/Bits/demos/record.xtl:16, libs/Bits/demos/record.xtl:17

ᵘs̲etMode : Int -> Int -> Int

function · line 9
@ ᵇf̲ields< "on:1 mode:3 level:8"
ᵇf̲ields< expands to
ᵘo̲n ← { x → (x d̲iv 1) m̲od 2 }
ᵘs̲etOn ← { v x → x + (1 × v m̲od 2) − 1 × (x d̲iv 1) m̲od 2 }
ᵘm̲ode ← { x → (x d̲iv 2) m̲od 8 }
ᵘs̲etMode ← { v x → x + (2 × v m̲od 8) − 2 × (x d̲iv 2) m̲od 8 }
ᵘl̲evel ← { x → (x d̲iv 16) m̲od 256 }
ᵘs̲etLevel ← { v x → x + (16 × v m̲od 256) − 16 × (x d̲iv 16) m̲od 256 }
Used in: reg, libs/Bits/demos/record.xtl:17

ᵘl̲evel : Int -> Int

function · line 9
@ ᵇf̲ields< "on:1 mode:3 level:8"
ᵇf̲ields< expands to
ᵘo̲n ← { x → (x d̲iv 1) m̲od 2 }
ᵘs̲etOn ← { v x → x + (1 × v m̲od 2) − 1 × (x d̲iv 1) m̲od 2 }
ᵘm̲ode ← { x → (x d̲iv 2) m̲od 8 }
ᵘs̲etMode ← { v x → x + (2 × v m̲od 8) − 2 × (x d̲iv 2) m̲od 8 }
ᵘl̲evel ← { x → (x d̲iv 16) m̲od 256 }
ᵘs̲etLevel ← { v x → x + (16 × v m̲od 256) − 16 × (x d̲iv 16) m̲od 256 }
Used in: libs/Bits/demos/record.xtl:16, libs/Bits/demos/record.xtl:18

ᵘs̲etLevel : Int -> Int -> Int

function · line 9
@ ᵇf̲ields< "on:1 mode:3 level:8"
ᵇf̲ields< expands to
ᵘo̲n ← { x → (x d̲iv 1) m̲od 2 }
ᵘs̲etOn ← { v x → x + (1 × v m̲od 2) − 1 × (x d̲iv 1) m̲od 2 }
ᵘm̲ode ← { x → (x d̲iv 2) m̲od 8 }
ᵘs̲etMode ← { v x → x + (2 × v m̲od 8) − 2 × (x d̲iv 2) m̲od 8 }
ᵘl̲evel ← { x → (x d̲iv 16) m̲od 256 }
ᵘs̲etLevel ← { v x → x + (16 × v m̲od 256) − 16 × (x d̲iv 16) m̲od 256 }
Used in: reg

reg : Int

value · line 10
reg ← 0
Used in: reg, libs/Bits/demos/record.xtl:14, libs/Bits/demos/record.xtl:15, libs/Bits/demos/record.xtl:16, libs/Bits/demos/record.xtl:17

reg : Int

value · line 11
reg ← 1 ᵘs̲etOn reg

reg : Int

value · line 12
reg ← 5 ᵘs̲etMode reg

reg : Int

value · line 13
reg ← 200 ᵘs̲etLevel reg